1. Field of the Invention
The present invention relates to a noise reducer and, more particularly, to noise reduction using a memory.
2. Description of Related Art
Various kinds of noise reducers (hereinafter referred to as NR circuits) for reducing a noise component of an input signal have heretofore been considered.
A particular kind of NR circuit using a memory, i.e., a so-called time-cyclic NR circuit, is widely used in a recent type of image processing apparatus as an NR circuit for an image signal because its effect is large in spite of its simple algorithm.
However, this kind of NR circuit needs a memory in principle, and the more the number of pixels of an image signal to be handled, the larger the required capacity of the memory.
For example, in recent years, there have been proposed a system which processes a high-definition video signal the number of pixels of which is approximately twice the number of pixels of an NTSC video signal, i.e., a so-called HD video signal, and a system using a progressive scanning type of image pickup element which outputs an image signal for one frame per 1/60 of a second instead of a conventional interlaced scanning type of image pickup element which outputs an image signal for one frame per 1/30 of a second.
In the above-described systems, to realize the aforesaid NR circuit, it is necessary to use a memory having a capacity which is approximately twice or more times the memory capacity of the system using the interlaced scanning type of image pickup element.